Skip to content
MN

//About

Systems, not components.

I like the questions that only make sense when you look at a whole machine at once.

Role
Hardware Engineer
Org
Dell Technologies
Focus
AI server platforms
Based
Austin, Texas

Background

I am a hardware engineer at Dell Technologies, working on the enterprise server platforms that large-scale AI training and inference run on. The work sits where hardware, firmware and software meet, which is exactly where the interesting failures live.

Outside that, I run an independent research program on edge and embedded machine-learning systems. It started as a curiosity about why a Raspberry Pi got so much slower than the arithmetic said it should, and turned into a body of work on memory bandwidth, thermal behaviour, energy, and how easily a benchmark can measure its own toolchain instead of the hardware.

My route into hardware started early, with a hands-on love of how things are put together: mechanical models, then electronics, then code. That shows up now in mentoring and judging hackathons, and in a bias toward building things that keep working after the demo.

Engineering philosophy

Understand complete systems rather than isolated technologies.

  • ? Why did the system fail?
  • ? Where is the bottleneck?
  • ? How do hardware and software interact here?
  • ? How do architecture decisions show up in performance?
  • ? How do we measure this objectively?
Manu at an ESD bench examining a server board through a magnifier probe
Manu in front of the Dell Technologies sign
Working inside an open server chassis

Where I have worked.

  1. Jun 2025 to present

    Austin, Texas

    Hardware Engineer, Root Cause Engineering

    Dell Technologies

    Server-scale system debug across PCIe, thermal behaviour and GPU/accelerator platforms on enterprise PowerEdge systems: fast-cycle triage, reliability assessment, and identifying the recurring failure patterns behind long-term stability improvements.

  2. Summer 2024

    Austin, Texas

    Root Cause Engineering Intern

    Dell Technologies

    Built a unified diagnostic tool for NVIDIA AI platforms: PCIe replay and bus-reset detection, optimised secondary-bus-reset procedures, and a real-time replay-detection workflow that improved fault isolation and technician usability.

  3. Summer 2023

    Lexington, Kentucky

    Controls Engineering Intern

    Schneider Electric

    Designed and deployed an HMI for palletizer control on the factory floor, optimised PLC-to-HMI communication in the packer line, and led an overhaul of internal standardisation specifications against ANSI/RIA and OSHA requirements.

Described in general terms. Specific platforms, cases and internal identifiers are confidential and are intentionally omitted.

Education and invention

Degree

B.S. Electrical Engineering
B.S. Computer Engineering

University of Massachusetts Amherst

Minors in Engineering Management and Economics. Coursework across embedded systems, digital electronics, computer architecture, signal processing, FPGAs, robotics, machine learning and cryptography.

Invention

Named inventor, one invention authorized for filing

Approved through Dell Technologies; USPTO filing pending

Plus internal invention disclosures and ongoing invention work. The patents and the publication record are two halves of the same body of work: the same measurement-driven engineering produces both.

What I actually do.

Hardware

  • / Enterprise servers
  • / PCIe
  • / GPU subsystems
  • / Motherboards
  • / Embedded hardware
  • / Microcontrollers
  • / Power systems
  • / Sensors

Software

  • / Python
  • / C / C++
  • / ONNX Runtime
  • / PyTorch
  • / Linux perf
  • / Hardware performance counters
  • / Automation
  • / Diagnostics

Engineering

  • / Root-cause analysis
  • / Failure analysis
  • / Validation
  • / Performance benchmarking
  • / Reliability engineering
  • / Experiment design
  • / Patent writing
  • / Research writing

Where this is going

Building toward technical leadership, in public.

The long-term aim is architecture and engineering leadership: the kind of engineer who is trusted with technical direction because the record shows measurement, invention and judgment, not just tenure. The record is being built deliberately, in public, on four fronts: peer-reviewed publication with reproducible artifacts, patents through Dell, evaluating other people's work as a judge and reviewer, and contributions to the open-source infrastructure the field actually runs on.

Everything on this site is a checkpoint against that aim. If it stops being true, it comes down.

Certifications

Coursework

  • AI Infrastructure and Operations Fundamentals NVIDIA · Aug 2026
  • Data Science: Probability (PH125.3x) HarvardX · Jun 2020
  • AI for Everyone: Master the Basics IBM · May 2020

Contact

If you are working on something that has to be measured properly, get in touch.

Email me LinkedIn ↗ GitHub ↗